Resources

One interesting way of achieving Python parallelism is through NumExpr*, in which a symbolic evaluator transforms numerical Python expressions into high-performance, vectorized code. Learn how to refactor Python code to take advantage of NumExpr’s capabilities..

Get a real-world walkthrough of how to improve performance by enabling vectorization for PIC codes. Uses the particle class in Athena++, an astrophysical magnetohydrodynamics (MHD) code written in C++.

There are a variety of algorithms to extract useful info from a graph. Explore the implementation characteristics of basic graph analysis algorithms and how they perform on Intel® Xeon® processors.

There are three ways to efficiently achieve parallelism in Python*: dispatch your own code, rely on a library, use a framework. This article looks at the third way … using Numba* to generate native-speed code.

Meet Intel’s optimizations for frameworks like Caffe* and TensorFlow* and see how Intel® Math Kernel Library for Deep Neural Networks (Intel® MKL-DNN)helps speed training and inference execution with no code changes.

Optimizing the vectorization of your program is crucial to its performance. Learn how Intel® Advisor—a free, standalone tool—pinpoints vectorization issues and shows how well you’re using the hardware.

How your app accesses memory is crucial to performance. (Read: parallelization and vectorization aren’t enough.). Intel® Advisor helps you diagnose and fix memory issues. Take a deep dive into how it’s done.

Chinese CSP JD found it could achieve 3.83x increased performance using its existing servers based on the Intel® Xeon® processor E5 family. Using BigDL to deploy its existing Caffe* model on servers where the data is stored, and optimizations using the Intel® Math Kernel Library, the company established an agile platform that can now be used to create new DL and AI applications, and reduced its TCO by reusing existing hardware estate for image analysis.

Field programmable gate arrays (FPGAs) not only are capable of high performance, they’re wonderfully malleable—configurable to match the application rather than the other way around. Because of this freedom, FPGA app developers have come to rely on tools and languages (specifically HDLs) used by hardware designers, rather than software programmers. But that’s changing. Find out the Intel® FPGA SDK for OpenCL™ technology provides an alternative to HDL programming.

Rendering interactive, photo-realistic, “wow factor” visuals is no longer solely the domain of the GPU. Software-Defined Visualization (SDVis) solutions—all targeted for the CPU—are redefining performance, from cinematic endeavors to scientific analysis. Find out how the open-source, high-performance rendering libraries in Intel® Rendering Framework are leveling the playing field on Intel® Xeon® processors … and how you can get your hands on the framework's libraries.